1. Field of the Invention
The present invention relates to a power amplification module.
2. Background Art
In a mobile communication device, such as a mobile phone, a power amplification module (power amplifier module) is used in order to amplify the power of a radio frequency (RF) signal to be transmitted to a base station. This power amplification module includes a power amplifier which amplifies the RF signal, and a bias circuit which supplies a bias current to a transistor constituting the power amplifier.
FIG. 10 is a diagram showing a configuration example of a power amplification module using an emitter follower type (common collector) bias circuit (for example, Patent Document 1). A bias circuit 1000 supplies a bias current to a bipolar transistor T100 constituting a power amplifier 1010, and has an emitter follower configuration. A battery voltage VBAT is applied to the collector of a bipolar transistor T110 constituting a bias circuit 1000.
In this configuration, if the bipolar transistors T100 and T110 are, for example, heterojunction bipolar transistors (HBT), the base-emitter voltage VBE of each bipolar transistor is about 1.3 V, and thus, the battery voltage VBAT of about 2.8 V is required in order to drive the bipolar transistor T110. For this reason, in general, the minimum voltage of the battery voltage VBAT is, for example, about 2.9 V.
On the other hand, in recent years, in a mobile communication device, such as a mobile phone, there has been demand for decreasing the minimum voltage of the battery voltage VBAT to about 2.5 V in order to improve a talking time or a communication time. However, in the configuration using the emitter follower (common collector) type bias circuit 1000 described above, the battery voltage VBAT of about 2.8 V is required, and thus, it is not possible to cope with this requirement.
Accordingly, as a configuration capable of operating a bias circuit with a lower battery voltage VBAT, a configuration in which a FET is used in a bias circuit has been suggested. FIG. 11 is a diagram showing a configuration example of a power amplification module using a FET in a bias circuit (for example, Patent Document 2). As shown in FIG. 11, a FET (F100) is used in a bias circuit 1100 which supplies a bias current to a bipolar transistor T100 of a power amplifier 1010.
However, as disclosed in Patent Document 2, a FET is used in the bias circuit, thereby making the battery voltage VBAT for operating the bias circuit a low voltage. However, in the configuration disclosed in Patent Document 2, resistors R100 and R110 which output a control voltage to be applied to the gate of the FET (F100) are different in temperature characteristics from the bipolar transistor T100. For this reason, in the configuration disclosed in Patent Document 2, the gain of the power amplifier 1010 fluctuates with change in temperature.